Chapter 1. Features and Capabilities

This chapter describes the features and capabilities of the DMediaPro DM3 board. The following topics are covered:

Board Components

Figure 1-1 shows the DM3 board with its connectors and LEDs. The board ships with two low-voltage differential signaling ( LVDS) cables that interface with the SGI video breakout box (VBOB).

Figure 1-1. DMediaPro DM3 Board and Panel

DMediaPro DM3 Board and Panel

Input/Output (I/O)

The DMediaPro system uses the VBOB for analog genlock connections and serial digital interface ( SDI) high-definition (HD) and standard-definition (SD) video I/O.


Note: For information on I/O and genlock timing features, see Chapters 3 and 4 in this guide. For a complete description of the VBOB, including all the I/O connectors, see the SGI Video Breakout Box Owner's Guide.


Supported Video Formats

The DM3 board supports video formats defined by the advanced television standards committee (ATSC), as well as several formats defined for high-definition digital motion pictures and post production. In addition, the board supports several standard-definition formats. These formats can have pixel clock rates of up to 74.25 MHz. These formats include support for:

  • 1080p, 1080i, 720p, 576i, and 480i video formats

  • 23.98, 24, 25, 29.97, 30, 59.94, and 60 Hz vertical rates

  • 16 x 9 and 4 x 3 aspect ratios

Examples of supported formats are SMPTE 274M (interlaced and progressive),
SMPTE 296 (progressive), ITU-R BT.601-5 (interlaced), SMPTE 260M, and SMPTE 240M.


Note: ITU-R BT.601-5 is also known as Rec. 601 and CCIR 601.

Table 1-1 lists the DM3 board video timings that are supported for this release of the board.

Table 1-1. Supported Video Timings

Description

Frame Rate

Timing

1920x1080 interlaced

30/1.001 Hz

ML_TIMING_1125_1920x1080_5994i

1280x720 progressive

60/1.001 Hz

ML_TIMING_750_1280x720_5994p

1280x720 progressive

60 Hz

ML_TIMING_750_1280x720_60p

1920x1080 interlaced

25 Hz

ML_TIMING_1125_1920x1080_50i

1920x1080 interlaced

30 Hz

ML_TIMING_1125_1920x1080_60i

1920x1080 progressive

24 Hz

ML_TIMING_1125_1920x1080_24p

1920x1080 progressive

24/1.001 Hz

ML_TIMING_1125_1920x1080_2398p

1920x1080 progressive

25 Hz

ML_TIMING_1125_1920x1080_25p

1920x1080 progressive segmented frame

25 Hz

ML_TIMING_1125_1920x1080_25PsF

1920x1080 progressive segmented frame

24 Hz

ML_TIMING_1125_1920x1080_24PsF

1920x1080 progressive segmented frame

24/1.001 Hz

ML_TIMING_1125_1920x1080_2398PsF

1920x1035 interlaced

30/1.001 Hz

ML_TIMING_1125_1920x1035_5994i

720 x 487 ( NTSC)

30/1.001 Hz

ML_TIMING_525

720 x 576 ( PAL)

25 Hz

ML_TIMING_625

In progressive segmented frame (PsF) formats, the progressive frame is transmitted as two fields that are from the same progressive scan, while in interlaced formats the two fields are temporally displaced.

All formats are 8-bit or 10-bit. These formats are used for content creation and telecine output, and support serial-parallel conversion.

Other Features

The DM3 board includes the following features:

  • Programmable field size (see “Re-sizing Field Height” in Chapter 4).

  • YCrCb with 8- or 10-bits per component (4:2:2 or 4:4:4 sampling rates).

  • Alpha channel support.

  • Video interface support for RGB 8- or 10-bits.

  • Support for up to 64 bits/pixel RGB in memory.

  • Real-time “transparent” color space conversion in ITU-R Rec. 601, ITU-R Rec. 709, SMPTE 240M, and key scaling.

  • User-programmable horizontal and vertical phase adjustment of the output video.

  • Unadjusted system time ( UST) and media stream count (MSC) support on input and output.

  • Gamma correction support through a user-downloadable 13-bit-wide lookup table.

  • 3/2 pulldown mode on output.

  • Packing modes (see Table 1-2). For VL/ML packing conversions, see “ML_IMAGE_PACKING” in Chapter 4 .

    Table 1-2. Supported Packing Modes

    ML_IMAGE_PACKING

    ML_IMAGE_SAMPLING

    ML_PACKING_8

    ML_SAMPLING_422

    ML_PACKING_8_3214

    ML_SAMPLING_422

    ML_PACKING_10

    ML_SAMPLING_422

    ML_PACKING_10_3214

    ML_SAMPLING_422

    ML_PACKING_10in16L

    ML_SAMPLING_422

    ML_PACKING_10in16L_3214

    ML_SAMPLING_422

    ML_PACKING_10in16R

    ML_SAMPLING_422

    ML_PACKING_10in16R_3214

    ML_SAMPLING_422

    ML_PACKING_10_10_10_2

    ML_SAMPLING_4224

    ML_PACKING_10_10_10_2_3214

    ML_SAMPLING_4224

    ML_PACKING_8

    ML_SAMPLING_444

    ML_PACKING_8_R

    ML_SAMPLING_444

    ML_PACKING_S12in16L

    ML_SAMPLING_444

    ML_PACKING_S12in16R

    ML_SAMPLING_444

    ML_PACKING_8

    ML_SAMPLING_4444

    ML_PACKING_8_R

    ML_SAMPLING_4444

    ML_PACKING_10_10_10_2

    ML_SAMPLING_4444

    ML_PACKING_10_10_10_2_R

    ML_SAMPLING_4444


Theory of Operation

The DM3 board is a full-duplex, dual-link interface between the SGI 400-MHz Crosstalk XIO bus and the DMediaPro low-voltage differential signaling (LVDS) links. The LVDS links run at seven times the programmed video rates, from 189 MHz to 519.75 MHz, corresponding to seven times the 27 MHz to 74.25 MHz video link rates.

The DM3 board supports high definition (HD), standard definition (SD), and serial digital transport interface (SDTI) video formats. The board also supports downloadable lookup tables (LUTs) for linear, log, and gamma correction.

The main components of the DM3 board are as follows:

  • An XIO-to-graphics interface contains an internal 100-MHz bus that interfaces with the board's video input and output pipes via direct memory access (DMA) engines.


    Note: This 100-MHz bus architecture is common to both the SGI HD I/O board and the SGI InfiniteReality graphics systems.


  • A guava interface contains the DMA engines, a local bus controller, and a PIO unit. This interface controls all of the DM3 board's field programmable gate arrays (FPGAs).

  • A video input formatter formats and controls the video input.

  • A high-definition output controller formats and controls the video output.

  • A control link contains the LVDS channel link control and the status logic.

  • Packers, unpackers, and input and output color space converters support various packings and color spaces.

Figure 1-2 is a simplified top-level diagram of the DM3 board.

Figure 1-2. DMediaPro DM3 Board Top-level Diagram

DMediaPro DM3 Board Top-level Diagram